6d1f2dc8a5
When priority type for core-power enable command is anything more than 1 display error before change to 1, which is ordered priority. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
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intel_pstate_tracer | ||
intel-speed-select | ||
turbostat | ||
x86_energy_perf_policy |