Michael S. Tsirkin f7ed3a5971 [IB] mthca: fix off by one in clr_int calculation ... We should use the first word of the clear interrupt register if the bit we're after is < 32, not < 31. Signed-off-by: Michael S. Tsirkin <mst@mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>		2005-09-26 09:38:34 -07:00
..
core	[IB] Fix RMPP receive length calculation	2005-09-21 12:33:09 -07:00
hw/mthca	[IB] mthca: fix off by one in clr_int calculation	2005-09-26 09:38:34 -07:00
ulp/ipoib	[PATCH] IPoIB: Don't flush workqueue from within workqueue	2005-09-20 10:52:04 -07:00
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