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sci-libs/composable-kernel: read expand-isa patch for 7.1.0
Closes: https://bugs.gentoo.org/965887 Signed-off-by: Sv. Lockal <lockalsash@gmail.com> Part-of: https://github.com/gentoo/gentoo/pull/44725 Signed-off-by: Sam James <sam@gentoo.org>
This commit is contained in:
Sv. Lockal
Sam James
parent
b54b419208
commit
8d50076eff
@ -41,6 +41,7 @@ PATCHES=(
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"${FILESDIR}"/${PN}-6.3.0-conditional-kernels.patch
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"${FILESDIR}"/${PN}-7.0.1-conditional-ckprofiler.patch
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"${FILESDIR}"/${PN}-7.0.1-libcxx-includes.patch
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"${FILESDIR}"/${PN}-7.1.0-expand-isa.patch
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)
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ck_check-reqs() {
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@ -0,0 +1,140 @@
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Fix for "undeclared identifier 'CK_BUFFER_RESOURCE_3RD_DWORD'" for AMDGPU_TARGETS="gfx1012".
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Combines of 3 patches from https://github.com/ROCm/composable_kernel/issues/775#issuecomment-2726315348
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Bug: https://bugs.gentoo.org/947583
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--- a/include/ck/ck.hpp
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+++ b/include/ck/ck.hpp
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@@ -78,7 +78,7 @@
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#define CK_BUFFER_RESOURCE_3RD_DWORD -1
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#elif defined(__gfx803__) || defined(__gfx900__) || defined(__gfx906__) || defined(__gfx9__)
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#define CK_BUFFER_RESOURCE_3RD_DWORD 0x00020000
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-#elif defined(__gfx103__)
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+#elif defined(__gfx101__) || defined(__gfx103__)
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#define CK_BUFFER_RESOURCE_3RD_DWORD 0x31014000
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#elif defined(__gfx11__) || defined(__gfx12__)
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#define CK_BUFFER_RESOURCE_3RD_DWORD 0x31004000
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@@ -86,12 +86,12 @@
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// FMA instruction
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#ifndef __HIP_DEVICE_COMPILE__ // for host code, define nothing
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-#elif defined(__gfx803__) || defined(__gfx900__) // for GPU code
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-#define CK_USE_AMD_V_MAC_F32
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-#elif defined(__gfx906__) || defined(__gfx9__) || defined(__gfx103__) // for GPU code
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+#elif defined(__gfx906__) || defined(__gfx9__) || defined(__gfx103__) || defined(__gfx1011__) || defined(__gfx1012__) // for GPU code
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#define CK_USE_AMD_V_FMAC_F32
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#define CK_USE_AMD_V_DOT2_F32_F16
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#define CK_USE_AMD_V_DOT4_I32_I8
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+#elif defined(__gfx803__) || defined(__gfx900__) || defined(__gfx101__) // for GPU code
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+#define CK_USE_AMD_V_MAC_F32
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#elif defined(__gfx11__) || defined(__gfx12__)
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#define CK_USE_AMD_V_FMAC_F32
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#define CK_USE_AMD_V_DOT2_F32_F16
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--- a/include/ck/tensor_operation/gpu/device/impl/device_batched_gemm_multiple_d_dl.hpp
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+++ b/include/ck/tensor_operation/gpu/device/impl/device_batched_gemm_multiple_d_dl.hpp
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@@ -71,7 +71,7 @@ __launch_bounds__(CK_MAX_THREAD_PER_BLOCK, CK_MIN_BLOCK_PER_CU)
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const Block2CTileMap block_2_ctile_map)
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{
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#if(defined(__gfx906__) || defined(__gfx908__) || defined(__gfx90a__) || defined(__gfx94__) || \
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- defined(__gfx103__) || defined(__gfx11__) || defined(__gfx12__))
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+ defined(__gfx101__) || defined(__gfx103__) || defined(__gfx11__) || defined(__gfx12__))
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const index_t num_blocks_per_batch =
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__builtin_amdgcn_readfirstlane(get_grid_size() / batch_count);
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--- a/include/ck/tensor_operation/gpu/device/impl/device_gemm_multiple_d_dl.hpp
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+++ b/include/ck/tensor_operation/gpu/device/impl/device_gemm_multiple_d_dl.hpp
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@@ -50,7 +50,7 @@ __launch_bounds__(CK_MAX_THREAD_PER_BLOCK, CK_MIN_BLOCK_PER_CU)
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const CGridDesc_M0_M10_M11_N0_N10_N11 e_grid_desc_m0_m10_m11_n0_n10_n11,
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const Block2CTileMap block_2_ctile_map)
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{
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-#if(defined(__gfx906__) || defined(__gfx9__) || defined(__gfx103__) || defined(__gfx11__) || \
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+#if(defined(__gfx906__) || defined(__gfx9__) || defined(__gfx101__) || defined(__gfx103__) || defined(__gfx11__) || \
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defined(__gfx12__))
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constexpr index_t shared_block_size =
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--- a/include/ck/tensor_operation/gpu/device/impl/device_grouped_conv_bwd_weight_dl.hpp
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+++ b/include/ck/tensor_operation/gpu/device/impl/device_grouped_conv_bwd_weight_dl.hpp
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@@ -48,7 +48,7 @@ __launch_bounds__(CK_MAX_THREAD_PER_BLOCK, CK_MIN_BLOCK_PER_CU)
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const Block2CTileMap block_2_ctile_map,
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const ComputePtrOffsetOfBatch compute_ptr_offset_of_batch)
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{
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-#if(defined(__gfx906__) || defined(__gfx103__) || defined(__gfx90a__) || defined(__gfx908__) || \
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+#if(defined(__gfx906__) || defined(__gfx101__) || defined(__gfx103__) || defined(__gfx90a__) || defined(__gfx908__) || \
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defined(__gfx94__) || defined(__gfx11__) || defined(__gfx12__))
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const index_t num_blocks_per_batch =
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__builtin_amdgcn_readfirstlane(get_grid_size() / batch_count);
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--- a/include/ck/tensor_operation/gpu/device/impl/device_grouped_conv_fwd_dl_multiple_d_nhwc_kyxc_nhwk.hpp
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+++ b/include/ck/tensor_operation/gpu/device/impl/device_grouped_conv_fwd_dl_multiple_d_nhwc_kyxc_nhwk.hpp
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@@ -90,7 +90,7 @@ __launch_bounds__(CK_MAX_THREAD_PER_BLOCK, CK_MIN_BLOCK_PER_CU)
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const Block2CTileMap block_2_ctile_map,
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const ComputePtrOffsetOfBatch compute_ptr_offset_of_batch)
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{
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-#if(defined(__gfx906__) || defined(__gfx103__) || defined(__gfx90a__) || defined(__gfx908__) || \
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+#if(defined(__gfx906__) || defined(__gfx101__) || defined(__gfx103__) || defined(__gfx90a__) || defined(__gfx908__) || \
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defined(__gfx94__) || defined(__gfx11__) || defined(__gfx12__))
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// offset base pointer for each work-group
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const index_t num_blocks_per_batch =
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--- a/include/ck/tensor_operation/gpu/device/impl/device_grouped_conv_fwd_dl_nhwc_kyxc_nhwk.hpp
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+++ b/include/ck/tensor_operation/gpu/device/impl/device_grouped_conv_fwd_dl_nhwc_kyxc_nhwk.hpp
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@@ -106,7 +106,7 @@ __launch_bounds__(CK_MAX_THREAD_PER_BLOCK, CK_MIN_BLOCK_PER_CU)
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const Block2CTileMap block_2_ctile_map,
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const ComputePtrOffsetOfBatch compute_ptr_offset_of_batch)
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{
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-#if(defined(__gfx906__) || defined(__gfx103__) || defined(__gfx11__) || defined(__gfx12__))
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+#if(defined(__gfx906__) || defined(__gfx101__) || defined(__gfx103__) || defined(__gfx11__) || defined(__gfx12__))
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// offset base pointer for each work-group
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const index_t num_blocks_per_batch =
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__builtin_amdgcn_readfirstlane(get_grid_size() / batch_count);
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--- a/include/ck/tensor_operation/gpu/device/impl/device_grouped_gemm_multiple_d_dl.hpp
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+++ b/include/ck/tensor_operation/gpu/device/impl/device_grouped_gemm_multiple_d_dl.hpp
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@@ -40,7 +40,7 @@ __launch_bounds__(CK_MAX_THREAD_PER_BLOCK, CK_MIN_BLOCK_PER_CU)
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const BElementwiseOperation b_element_op,
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const CDEElementwiseOperation cde_element_op)
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{
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-#if(defined(__gfx906__) || defined(__gfx908__) || defined(__gfx90a__) || defined(__gfx103__) || \
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+#if(defined(__gfx906__) || defined(__gfx908__) || defined(__gfx90a__) || defined(__gfx101__) || defined(__gfx103__) || \
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defined(__gfx11__) || defined(__gfx94__) || defined(__gfx12__))
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__shared__ char p_shared[GridwiseGemm::GetSharedMemoryNumberOfByte()];
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--- a/include/ck/tensor_operation/gpu/grid/gridwise_gemm_dpp.hpp
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+++ b/include/ck/tensor_operation/gpu/grid/gridwise_gemm_dpp.hpp
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@@ -28,7 +28,7 @@ __launch_bounds__(CK_MAX_THREAD_PER_BLOCK, CK_MIN_BLOCK_PER_CU)
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#endif
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kernel_gemm_dpp(const typename GridwiseGemm::Argument karg)
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{
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-#if(defined(__gfx103__) || defined(__gfx11__))
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+#if(defined(__gfx101__) || defined(__gfx103__) || defined(__gfx11__))
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__shared__ char p_shared[GridwiseGemm::GetSharedMemoryNumberOfByte()];
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const auto a_grid_desc_ak0_m_ak1 = amd_wave_read_first_lane(
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--- a/include/ck/tensor_operation/gpu/grid/gridwise_tensor_rearrange.hpp
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+++ b/include/ck/tensor_operation/gpu/grid/gridwise_tensor_rearrange.hpp
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@@ -36,7 +36,7 @@ __launch_bounds__(CK_MAX_THREAD_PER_BLOCK, CK_MIN_BLOCK_PER_CU)
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const ComputePtrOffsetOfStridedBatch compute_ptr_offset_of_batch)
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{
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#if(defined(__gfx906__) || defined(__gfx908__) || defined(__gfx90a__) || defined(__gfx94__) || \
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- defined(__gfx103__) || defined(__gfx11__) || defined(__gfx12__))
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+ defined(__gfx101__) || defined(__gfx103__) || defined(__gfx11__) || defined(__gfx12__))
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GridwiseTensorRearrangeKernel::Run(in_grid_desc,
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p_in_global,
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out_grid_desc,
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--- a/include/ck_tile/core/config.hpp
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+++ b/include/ck_tile/core/config.hpp
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@@ -9,6 +9,9 @@
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#if defined(__gfx942__) || defined(__gfx950__)
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#define __gfx94__
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#endif
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+#if defined(__gfx1010__) || defined(__gfx1011__) || defined(__gfx1012__)
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+#define __gfx101__
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+#endif
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#if defined(__gfx1030__) || defined(__gfx1031__) || defined(__gfx1032__) || \
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defined(__gfx1034__) || defined(__gfx1035__) || defined(__gfx1036__) || \
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defined(__gfx10_3_generic__)
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@@ -200,7 +203,7 @@
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#elif defined(__gfx803__) || defined(__gfx900__) || defined(__gfx906__) || \
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defined(__gfx9__) // for GPU code
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#define CK_TILE_BUFFER_RESOURCE_3RD_DWORD 0x00020000
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-#elif defined(__gfx103__) // for GPU code
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+#elif defined(__gfx101__) || defined(__gfx103__) // for GPU code
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#define CK_TILE_BUFFER_RESOURCE_3RD_DWORD 0x31014000
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#elif defined(__gfx11__) || defined(__gfx12__) // for GPU code
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#define CK_TILE_BUFFER_RESOURCE_3RD_DWORD 0x31004000
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